24 research outputs found

    A Host Interface Architecture and Implementation for ATM Networks

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    The advent of high speed networks has increased demands on processor architectures. These architectural demands are due to the increase in network bandwidth relative to the speeds of processor components. One important component for a high-performance system is the workstation-to-network host interface . The solution presented in this thesis migrates a carefully selected set of protocol processing functions into hardware. The host interface is highly parallel and all per cell functions are performed by dedicated logic to maximize performance. There is a clean separation between the interface functions, such as segmentation and reassembly, and the interface/host communication. This architecture has been realized in a prototype which connects an IBM RISC System/6000 workstation to a SONET-based ATM network carrying data at the OC-3c1 rate of 155 Mbps

    Operating Systems Support for End-to-End Gbps Networking

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    This paper argues that workstation host interfaces and operating systems are a crucial element in achieving end-to-end Gbps bandwidths for applications in distributed environments. We describe several host interface architectures, discuss the interaction between the interface and host operating system, and report on an ATM host interface built at the University of Pennsylvania. Concurrently designing a host interface and software support allows careful balancing of hardware and software functions. Key ideas include use of buffer management techniques to reduce copying and scheduling data transfers using clocked interrupts. Clocked interrupts also aid with bandwidth allocation. Our interface can deliver a sustained 130 Mbps bandwidth to applications, roughly OC-3c link speed. Ninety-three percent of the host hardware subsystem throughput is delivered to the application with a small measured impact on other applications processing

    AVATAR -- ATM VideoAudio Transmit and Receive

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    To facilitate the transport of audio and video data across emerging Asynchronous Transfer Mode (ATM) networks, a simple, low cost, audio/video ATM appliance, the AVATAR, has been developed. This appliance is capable of handling uncompressed bidirectional audio and NTSC video connections. The intended applications for this device include TeleMentoring (a NSF sponsored exploration of distance mentoring), video conferencing, and network monitoring. Our experience has shown that AVATAR is an effective, low cost means of providing multimedia connectivity between sites within the Aurora Gigabit testbed

    Experimental Evaluation of an ATM Host Interface

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    We have previously reported a design for a host interface board intended to connect workstations to ATM networks, and an implementation that was underway. Since then, we have made some modifications to the hardware implementation, and implemented software support. Our prototype connects an IBM RS/6000 to a SONET-based ATM network carrying data at the OC-3c rate of 155Mbps. In this paper, we discuss an experimental evaluation of the interface and supporting software. Our experiments uncovered an unexpected bottleneck in providing high bandwidth to application processes, and we suggest a number of possible improvements to workstation architectures to address this bottleneck

    Implementation and Performance of An ATM Host Interface for Workstations

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    This brief paper outlines our strategies for providing a hardware and software solution to interfacing hosts to high-performance networks. Our prototype implementation connects an IBM RS/6000 to a SONET-based ATM network carrying data at the OC-3c rate of 155Mbps. We have measured application-to-network data rates of up to 130 Mbps

    Event Signaling Within Higher Performance Network Systems

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    The afterburner ATM link Adapter has allowed us to evaluate three event-signaling schemes: polling, traditional interrupts and the clocked interrupts first investigated in our operating system work in AURORA. The schemes are evaluated in the context of a single-copy TCP/IP stack. The experimental results indicate that clocked interrupts can provide throughput comparable with traditional interrupts for dedicated machines (up to over 144 Mbps, the highest TCP/IP/ATM throughput reported), and better performance when the machines are loaded with an artificial workload. Polling, implemented to be used with an unmodified netperf measurement tool, was competitive for small TCP/IP socket buffer sizes (¡32KB). We concluded that clocked interrupts may be preferable for applications requiring high throughput on systems with heavy processing workloads, such as servers

    Host Interfacing at a Gigabit

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    A major goal of the host interface architecture which has been developed at UPenn is to be sufficiently flexible as to allow implemention using a range of technologies. These technologies can provide the performance necessary for operation in the emerging high bandwidth ATM networking environments. This paper examines the feasibility of reimplementing the current instantiation of the architecture which operates at 160 Mbps to allow for operation in the 600+ Mbps domain. 1 Introduction The host interface architecture[6] developed at UPenn allows the interconnection of workstation hosts with high bandwidth networking environments. The basic philosophy for this work has been to develop an architecture which provides hardware support for a "common denominator" of network services, in this case, all per cell operations, in a general enough manner to allow the architecture to be implemented in a variety of technologies. This allows the implementor to select the appropriate technology on a c..

    Giving Applications Access to Gb/s Networking

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    Network fabrics with Gigabit per second (Gbps) bandwidths are available today, but these bandwidths are not yet available to applications. The difficulties lie in the hardware and software architecture through which application data travels between the network and host memory. The hardware portion of the architecture is often called a host interface and the remainder of the protocol stack is implemented in host software. In this paper, we outline a variety of approaches to the architecture of such systems, examine several design points, and study one example in detail. The detailed example, an ATM Host Interface and Operating System support built at the University of Pennsylvania, illustrates design tradeoffs for hardware and software, and some of the implications of these tradeoffs on applications performance. 1. Introduction The past several years have seen a profusion of efforts to design and implement very-high speed networks which deliver this speed "end-to-end". A good example i..
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